| 三至五位高速A／D转换器设计 |
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| 引用本文： | 赵民德.三至五位高速A／D转换器设计[J].科技通报,1993,9(4):221-225. |
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| 作者姓名： | 赵民德 |
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| 作者单位： | 杭州大学计算机科学系 310028 |
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| 摘 要： | 在计算机实时控制过程中,有时需要用到高速、低分辨率的A/D转换器.本文根据并行A/D转换器原理,设计了一种高速。低分辨率的A/D转换器.对其编码电路部分采用了简化设计,使整个A/D转换电路线路简单、成本低,它的转换速度可达每秒几百万次,是一种实用、价廉的A/D转换器。
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| 关 键 词： | 分辨率 模－数转换器 电压比较器 |
Design of 3 to 5-Bit High-Speed A/D Converters |
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| Zhao Minde Computer Science.Design of 3 to 5-Bit High-Speed A/D Converters[J].Bulletin of Science and Technology,1993,9(4):221-225. |
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| Authors: | Zhao Minde Computer Science |
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| Abstract: | In the case of computer real-time control, high-speed low-resolution A/D converters are sometimes used.
According to the principle of the parallel A/D converter, this paper proposes the design of a kind of high-
speed low-resolution A/D converters, in which the coding circuits are simplified, and hence the simplification
of the whole circuit and the low cost. The transformation speed reaches millions times per second. |
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| Keywords: | resolution A/D convert logic disign voltage comparator |
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