| 基于FPGA的AD转换控制器设计 |
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| 引用本文： | 辛凤艳,孙晓晔.基于FPGA的AD转换控制器设计[J].中国科技信息,2012(5):78-79. |
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| 作者姓名： | 辛凤艳 孙晓晔 |
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| 作者单位： | 1. 河北省科学院应用数学研究所,石家庄,050081
2. 石家庄开发区冀科双实科技有限公司 |
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| 摘 要： | 采用FPGA器件EP1C12实现了对A/D转换芯片AD7822的实时采样控制,并将采集的数据暂存到SRAM中以备后续处理。整个设计在QuartusⅡ环境下,采用Verilog HDL语言描述,给出了硬件电路连接、硬件内部逻辑设计以及测试波形,可用于模拟信号的高速实时采集。
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| 关 键 词： | FPGA Verilog HDL A/D转换 采样控制 |
A Design of the A/D Convertion Control Module Based on FPGA |
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| Xin Fengyan,Sun Xiaoye.A Design of the A/D Convertion Control Module Based on FPGA[J].CHINA SCIENCE AND TECHNOLOGY INFORMATION,2012(5):78-79. |
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| Authors: | Xin Fengyan Sun Xiaoye |
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| Institution: | 1.Applied Mathematics Institute,HeBei Academy of Science,Shijiazhuang 050081;2.Shijiazhuang Development Zone Jikeshuangshi Science & Technology Co,Ltd |
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| Abstract: | FPGA device EP1C12 controls AD7822 to collect analog signal and convert into digital signal,then saves the data to SRAM.The whole design is under the Quartus Ⅱ platform,described in the Verilog HDL.The hardware circuit,internal logic design and waveforms are given.It can be used for high-speed real-time acquisition of analog signal. |
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| Keywords: | FPGA Verilog HDL A/D convertion Sampling control |
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