Parasitic tolerant designs of sampled data filters using switched capacitors and unity gain amplifiers |
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| Authors: | BB Bhattacharyya R Raut |
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| Institution: | Department of Electrical Engineering, Concordia University, 1455 de Maisonneuve Blvd, West Montreal, Quebec H3G 1M8, Canada |
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| Abstract: | New and systematic procedures are presented for realizing sampled data filter (SDF) functions using switched capacitors (SCs) and unity gain amplifiers (UGAs). The procedures are attractive and simple to implement. Any SDF, recursive or non-recursive and of any order, can be realized using the methods presented. The designs of biquadratic SDFs is discussed in detail. The resulting realizations possess the property that the numerator and denominator coefficients of the SDF functions can be controlled by independent capacitance ratios. This makes the filters attractive for adaptive applications. The sensitivity properties of the resulting filters are analyzed and guidelines given for obtaining low sensitivity realizations. A method is also suggested to make the filters relatively insensitive to the parasitic capacitances in the circuit. Finally, a step by step procedure, easily implemented in a computer, is given. Starting from the given analog filter specifications, the method yields a design that has very low sensitivity, uses minimum total capacitance and is tolerant of the various parasitic capacitances in the circuit. Experimental results show very good agreement with the theoretical analysis. |
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