基于FPGA的Deflate算法核心模块设计 |
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引用本文: | 孙圣.基于FPGA的Deflate算法核心模块设计[J].人天科学研究,2010(5). |
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作者姓名: | 孙圣 |
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作者单位: | 桂林理工大学信息科学与工程学院 |
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摘 要: | 基于嵌入式设备FPGA,对无损压缩算法Deflate算法进行加速。采用哈希表方法,把Deflate核心算法用在FPGA上,实现了软硬件协同设计。独创性地设计并实现了窗口大小为32K的Deflate算法。主要介绍该设计的哈希表模块部分。
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关 键 词: | 嵌入式 FPGA 无损压缩 Deflate 懒惰匹配 哈希表 |
The Core Module Design of Deflate Algorithm on FPGA |
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Abstract: | It is based on the embedded equipment FPGA,to accelerate the lossless compression algorithm in the article.It implements the collaborative design realizing the core mechanic of the Deflate algorithm on FPGA,in the method of the hash table,which implements the Deflate algorithm of the window in the size of 32K originally.It provides the information of the hash table module portion principally. |
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Keywords: | Enbedded Fpga Lossless Compression Deflate Lazy Match Hash Table |
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