Digital redesign tracker for cascaded analog systems with state saturation and external loads |
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Authors: | Jason Sheng-Hong Tsai Meng-Che Wu Leang-San Shieh |
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Institution: | a Control System Laboratory, Department of Electrical Engineering, National Cheng-Kung University, Tainan 701, Taiwan, ROC b Department of Electrical and Computer Engineering, University of Houston, Houston, TX 77204-4005, USA |
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Abstract: | This paper presents a newly developed digital redesign control scheme with a weighted switching strategy and output-reference tracking, for a cascaded analog system with state saturation and external loads. The proposed method improves the generally poor transition response and output deviation caused by state-saturation constraint and external loads. It replaces an existing or theoretically well-designed analog controller with state saturation, by a digital controller with almost identical performance. |
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Keywords: | Digital redesign State saturation Sampled-data control Output-reference tracking |
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